CriticalBlue releases coprocessor synthesis tool

Richard Goering
(05/19/2004 2:00 PM EDT)

  SANTA CRUZ, Calif. — Offering a way to accelerate software in synthesized coprocessors, startup CriticalBlue this week (May 19) is announcing the commercial release of its Cascade tool suite. The company is also claiming to have verified Cascade's use and accuracy within a Synplicity tool flow.

CriticalBlue (Edinburgh, Scotland) announced its mission and its plan for Cascade in May 2003. Cascade takes applications software and synthesizes a hardware coprocessor that accelerates software tasks chosen by the user. It thus offers a middle ground between building custom hardware and putting functionality in embedded software on a standard processor. <P> Cascade lets users identify which tasks and functions take the most time, and place them into a coprocessor. It reports the impact on performance and area, and generates a variety of coprocessor solutions. For the selected solution, it generates synthesizable RTL code along with a testbench for verification. <P> Cascade is now in ">CriticalBlue CEO. He identified ST Microelectronics as a customer, but acknowledged there are no tapeouts yet. While CriticalBlue is not looking for a large number of engagements, he said, it is seeking additional projects and companies who want to try the new approach.

Working in conjunction with Synplicity, Steward said, CriticalBlue verified the ability to pass synthesis and simulation data to that company's SynplifyPro and Synplify ASIC tools. Most significantly, he said, the results predicted by Cascade matched the FPGA and ASIC implementations that were produced downstream.

While the basic description of Cascade has not changed since May 2003, the company's positioning is somewhat different, Stewart said.

"Last year at DAC [Design Automation Conference] we were put in the ESL [electronic system level] bucket," Stewart said. "But as we talked to customers throughout the year, we came to the conclusion that we were actually part of the implementation flow. Executable code in the software domain is like RTL in the hardware domain. So we're migrating from one implementation format to another."