Creonic Participates in National Research Project KI-Radar
Kaiserslautern, Germany, Aug 27, 2019 – Creonic is pleased to announce its participation in the BMBF funded research project KI-Radar. The main focus is on artificial intelligence for radar systems used for autonomous driving. The German project partners KSG GmbH, Creonic GmbH, University of Bielefeld, and Fraunhofer IZM Institute will develop a new AI-based hardware platform to build distributed AI data processing (edge-cloud computing) in the vehicle. The main innovations are the AI processing of radar data in an edge-cloud to increase significantly the resolution and the reliability of object detection and the integration of 3D radar antennas.
Creonic is responsible for the communication between the sensors boards and for dedicated AI engines on FPGA. The project is funded by Federal Ministry of Education and Research for three years and is a big step towards autonomous driving for mass market.
About Creonic
Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for several algorithms of communications such as forward error correction (LDPC, Turbo, Polar), modulation, and synchronization. The company offers the richest product portfolio in this field, covering standards like 5G, 4G, DVB-S2X, DVB-RCS2, DOCSIS 3.1, WiFi, WiGig, and UWB. The products are applicable for ASIC and FPGA technology and comply with the highest requirements with respect to quality and performance. For more information please visit our website at www.creonic.com.
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related News
- Research Project "Power Control" Aims for the Increase of Energy Efficiency in Industrial Facilities
- Creonic Participates in International SENDATE-TANDEM Research Project
- Creonic Shows 100 Gbps Polar Decoder in International SENDATE-TANDEM Research Project
- Creonic Participates in H2020 "VERTIGO" Research Project
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers