Cadence Digital Implementation and Parasitic Extraction Tools Enabled for Samsung Foundry Gate-All-Around Technology
SAN JOSE, Calif. -- Mar 29, 2019 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Innovus™ Implementation System and Quantus™ Extraction Solution are now enabled for the Samsung Foundry Gate-All-Around (GAA) technology. The Cadence tools have been confirmed to meet Samsung Foundry’s technology requirements, which lets customers who produce high-end products for the mobile, networking, server and automotive markets leverage GAA technology. Additionally, the long-term collaboration between Cadence and Samsung resulted in a successful test vehicle tapeout using this extreme ultraviolet (EUV) technology.
Cadence provided Samsung Foundry with advanced design methodologies for the Innovus Implementation System and Quantus Extraction Solution to ensure signoff verification was completed for the test vehicle tapeout. The Innovus Implementation System delivered optimized performance with Samsung’s advanced design rules, while the Quantus Extraction Solution demonstrated strong correlation with implementation, resulting in the on-time tapeout of the industry-standard CPU block. To learn more about the Cadence Innovus Implementation System, please visit www.cadence.com/go/innovusgaa. For more information on the Cadence Quantus Extraction Solution, visit www.cadence.com/go/quantusgaa.
“Through our ongoing collaboration with Cadence, the Innovus Implementation System and Quantus Extraction Solution enablement was confirmed, which resulted in the successful test vehicle tapeout for GAA process development,” said Jung Yun Choi, vice president of the Design Technology Team at Samsung Electronics. “Customers creating state-of-the-art designs for emerging high-end markets can look to Cadence and Samsung to deliver advanced GAA technology to support these innovations.”
“By collaborating with Samsung Foundry, we’re continuing to drive advanced-node design innovation in evolving areas like mobile, networking, server and automotive applications,” said KT Moore, vice president, product management in the Digital & Signoff Group at Cadence. “The Innovus Implementation System and the Quantus Extraction Solution are enabled for the Samsung Foundry GAA technology to optimize power, performance and area to meet competitive market demands.”
The Innovus Implementation System and Quantus Extraction Solution are part of the broader Cadence digital and signoff portfolio. The integrated Cadence full-flow digital and signoff tools provide a fast path to design closure and better predictability and support the company’s overall System Design Enablement strategy, which enables systems and semiconductor companies to create complete, differentiated end products more efficiently.
About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related News
- Samsung Foundry Certifies Cadence Voltus-XFi Custom Power Integrity Solution for 5LPE Process Technology
- Cadence Expands Collaboration with Samsung Foundry to Advance 3D-IC Design
- Cadence and Samsung Foundry Enter Multi-Year Agreement to Expand Design IP Portfolio
- Samsung Foundry Certifies Cadence Virtuoso Studio Flow to Automate Analog IP Migration on Advanced Process Technologies
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers