Meet Axiomise's Ashish Darbari at DAC to Learn about Benefits of Formal Verification
Will Present “Taming the Beast: RISC-V Formal Verification Made Easy”;
Panelist on “Those Darn Bugs! When Will They be Exterminated for Good?”
LONDON –– June 28, 2022 ––
WHO: Dr. Ashish Darbari, CEO and founder of Axiomise, the leading provider of cutting-edge formal verification services and custom solutions
WHAT: Will be a visible presence at this year’s Design Automation Conference (DAC) promoting the adoption of Formal Verification.
He will serve as a panelist on “Those Darn Bugs! When Will They be Exterminated for Good?” moderated by Brian Bailey of Semiconductor Engineering Monday, July 11, from 3 p.m. until 3:45 p.m. at the DAC Pavilion (second floor).
Dr. Darbari will present “Taming the Beast: RISC-V Formal Verification Made Easy” at the Cadence Design Systems Theater (DAC Booth #1511) Monday at 4 p.m. and Tuesday at 1:30 p.m.
WHEN: DAC runs from Monday, July 11, through Wednesday, July 13, from 10 a.m. until 6 p.m. at the Moscone West in San Francisco. Registration is open.
It will be collocated with SEMICON West 2022 Hybrid at the Moscone Center. Registration is open.
About Axiomise
Axiomise is dedicated to furthering the adoption of formal verification through its unique combination of consulting, services and specialized verification solutions for RISC-V. Founded by Dr. Ashish Darbari, a formal verification practitioner for over two decades, it offers cutting-edge, formal verification training, consulting and services. An active user of all formal technologies, including theorem proving, model checking and equivalence checking, Dr. Darbari and his team have trained more than 200 engineers across the semiconductor industry. Dr. Darbari has 46 patents in the field of formal verification.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- New cores and peripherals enrich Dolphin's kit for audio ADC and DAC converters
- Kaben Enters Baseband Video DAC IP Market
- Meet the DSP Algorithmic Experts at DAC 2005; AccelChip Focuses on DSP Solutions in Booth 1000
- German company to introduce PLL IP core at DAC
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack