Advantest doubles speed system-on-chip testing with new dynamic handler
![]() |
Advantest doubles speed system-on-chip testing with new dynamic handler
By Semiconductor Business News
December 13, 2001 (8:38 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011213S0012
TOKYO -- Advantest Corp. has introduced a new dynamic test handler capable of doubling the throughput of high-end logic and system-on-chip testing by performing tests on up to eight devices simultaneously. The maximum throughput of 6,000 devices per hour is twice the capacity of the system's predecessor, Advantest said. The M4541AD employs a new device-handling mechanism and optimizes the motion efficiency of the handler's pickup arm, which helps cut test costs by providing shorter index times and maximizing throughput, said the company, which formally rolled out the new handlers at last week's Semicon Japan trade show. The handler said connects with SoC automatic test systems to support fast manufacturing-line testing, and it can be used together with memory ATE systems, said the Japanese tester supplier. This capability provides a cost-effective solution to distributing the burden of lengthy SoC testing between both system-on-chip and mem ory testers to optimize efficiency--a practice known as "two-pass testing," Advantest said. Advantest said it has also addressed cost issues by reducing the size of the system and increasing the energy efficiency compared to previous models. A heat plate enables testing of chip performance under high temperatures. A new architecture for device interfaces incorporates a new layout unit, which forms an additional layer between the handler and Advantest's existing device interfaces. This makes it possible to adjust the system for different socket arrangements and contact pitches without additional investments for specific IC package configurations, said Advantest. The M4541AD uses a new pressure control mechanism that allows steady, constant pressure on the device, helping to reduce contact fails and thus increase handler reliability, said the company. A motorized pickup arm has made it possible to automatically adjust the arm's stroke and speed, helping prevent devices from cracking and chipping, accor ding to Advantest.
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related News
- Bluetooth 5 quadruples range, doubles speed, increases data broadcasting capacity by 800%
- VESA Defines New Standard to Help Speed PC Industry Adoption of High Dynamic Range Technology in Laptop and Desktop Monitor Displays
- Advantest Developing Innovative Methodologies for High-Speed Scan and Software-Based Functional Testing
- Sirius Wireless Partners with S2C on Wi-Fi6/BT RF IP Verification System for Finer Chip Design
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing