AI Becomes the New Moore's Law
2018-07-16 09:47:00
Analysis & Insight
Chiplet News Archive - Page 491 of 1946
ArcSoft and Cadence Partner to Develop AI and Vision Applications
2018-07-13 09:34:00
SoC Architecture & Assembly
DSP Group and Inside Secure Collaborate on Development of Advanced Secured AI Processors
2018-07-13 09:24:00
Commercial Deals
Cadence Automotive Solution for Safety Verification Used by ROHM to Achieve ISO 26262 ASIL D Certification
2018-07-13 09:22:00
EDA & Design Tools
Intel to Acquire eASIC
2018-07-13 09:16:00
Strategic Partnerships
Moortec to exhibit at the TSMC Europe Open Innovation Platform Ecosystem Forum & Technology Symposium
2018-07-12 13:23:00
Misc
AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports First Release of Accellera Portable Test and Stimulus Standard (PSS)
2018-07-12 13:05:00
EDA & Design Tools
Veriest appoints Vukota Pekovic as General Manager, Serbia
2018-07-11 13:35:00
People & Leadership
Stratix 10 SoC: REFLEX CES is releasing to market its new version of the COM Express module based on Stratix 10 SoC technology from Intel PSG
2018-07-10 15:47:00
SoC Architecture & Assembly
Terminus Circuits Brings Complete ASIC Solutions to DesignShare
2018-07-10 15:00:00
Strategic Partnerships
Arteris IP Ncore and FlexNoC Interconnects and Resilience Packages Licensed by Mobileye for AI-Powered EyeQ Chips
2018-07-10 14:26:00
Commercial Deals
GLOBALFOUNDRIES Surpasses $2 Billion in Design Win Revenue on 22FDX Technology
2018-07-10 11:47:00
Foundries & Process Nodes
TSMC June 2018 Revenue Report
2018-07-10 11:39:00
Financials
Inside Secure Technology Chosen to Secure Kalray's Intelligent Processors for Autonomous Vehicles and Next-Generation Data Centers
2018-07-10 09:42:00
Commercial Deals
EDA Takes to the Cloud (Sort of)
2018-07-09 13:27:00
Analysis & Insight
UMC Reports Sales for June 2018
2018-07-09 10:55:00
Financials
Baidu Accelerator Rises in AI
2018-07-09 10:42:00
Analysis & Insight
Cadence JasperGold Formal Verification Platform Enables Hitachi to Develop Measures for Fault Avoidance to Comply with IEC 61508 Series SIL 4 Requirements
2018-07-09 10:34:00
EDA & Design Tools
Hardware: Golden Age or Golden Ager?
2018-07-09 09:52:00
Analysis & Insight
Renode 1.4 released: 64-bit RISC-V HiFive Unleashed support, multiple Silicon Labs targets, and more
2018-07-09 08:37:00
SoC Architecture & Assembly