IP Catalog > V-by-One HS Video Interface

V-by-One HS video interface IP

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Compare 4 IP from 3 vendors (1 - 4)
  • General Video Interface HS Receiver PHY
    • General Video Interface HS Receiver PHY IP
    • Next generation HD interface with low EMI
    • Fully comply with V-By-One HS V1.3 electrical specification
    • Low power consumption for multiple lane application
  • General Video Interface HS Transmitter PHY
    • Next generation HD interface with low EMI
    • Fully comply with V-By-One HS V1.3 electrical specification
    • 0.45Gbps to 3Gbps continues data rate range
    • Compatible with both CML and LVDS topology
  • FPD LVDS Display Interface, 1 Port / 2 Port LCD Panel
    • The DB-FPD-LVDS-TX LVDS Display Interface IP Core interfaces parallel 18-bit/24-bit RGB Pixel Data with display timing VSYNC, HSYNC, Data Enable, and Pixel Clock to a FPD LVDS compliant display panel via 3 or 4 or 5 LVDS Differential Data Pairs and 1 LVDS Differential Clock Pair.
    Block Diagram -- FPD LVDS Display Interface, 1 Port / 2 Port LCD Panel
  • VBO TX and RX PHY & Controller
    • Innosilicon VBO IP is designed for transmitting or receiving video signals between a video source device and display device, which is fully compliant with VBO1.4 specifications
    • The IP provides both PHY and controller solutions, offering a reliable implementation for VBO interface that can be seamlessly integrated into the SoCs used in multimedia devices
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    Block Diagram -- VBO TX and RX PHY & Controller
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Semiconductor IP