PLL DLL IP
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Ring oscillator-based analog PLL
- Our ring oscillator-based analog PLL provides good phase noise performance with extremely low energy consumption and small area compared to the state-of-the-art products.
- The programmable divider allows to shift the output frequency with a large locking range.
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800/1000 MHz DLL-based frequency multiplier
- TSMC 90 nm CMOS
- Low jitter
- Precisely aligns the clock distribution output with a reference clock
- Low current consumption