Nios II IP
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6
IP
from 5 vendors
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6)
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Avalon Multi-port DDR2 Memory Controller
- 200 / 333 MHz (400/666 Mbps) Cyclone/Stratix DDR2 memory performance
- DDR2 Memory Devices
- From 1 to 16 Avalon-MM local bus port interfaces
- Memory bandwidth utilization in excess of 95%
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Avalon Multi-port SDRAM Memory Controller IP Core
- 200 / 333 MHz (400/666 Mbps) Cyclone / Stratix DDR2 memory performance
- SDR, DDR, DDR2 and Mobile DDR SDRAM Memory Devices
- From 1 to 16 Avalon-MM local bus port interfaces
- Memory bandwidth utilization in excess of 95%
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I2C Controller
- Compatible with Philips I²C(PCF 8584) standard
- Supports both Master and Slave mode
- Automatic detection and adoption to bus interface type
- Multi-master operation
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I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus)
- I2C Slaver only with Parameterized FIFO:
- Targets embedded processors with high performance algorithm requirements, by independently controlling the Transmit or Receive of bytes of information.
- Small VLSI footprint
- Slave Controller Modes: