NIOSII_SC soft IP Processor is the safety critical version of the of the Nios II processor targeting airborne electronic applications
The design assurance strategy of NIOSII_SC is elaborated in accordance with the DO-254 recommendations for DAL A, particularly on the appendix B (specific to complex components in DAL A/B) which describes recommendations for additional design assurance.
The NIOSII_SC soft IP Processor is the best solution to overcome safety issues when using COTS microprocessors in avionics applications. These issues are detailed in the document "Microprocessor Evaluations for Safety-Critical, Real-Time Applicaions: Authority for Expenditure No. 43 Phase 1 Report" issued by the Federal Aviation Administration (FAA).
Nios II Soft IP Processor for Safety Critical Applications
Overview
Deliverables
- The NIOSII_SC version 1.0 is available with the complete certification package through HCELL Engineering to customers who should comply with DO-254 standard for airborne applications or any other safety critical applications.
- NIOSII_SC package allows easy integration of the processor IP within the customer design and provides required data for customer design certification
Technical Specifications
Availability
Now
Related IPs
- ARC HS48FS, host processor, with ASIL B / ASIL D support, including lock-step for functional safety applications
- ARC HS48FSx4 quad-core, host processor , ASIL B / ASIL D support, incl. lock-step for functional safety applications
- IP for Automotive Applications
- Chiplet Interconnect - Die-to-die interconnect IP solutions for advanced and standard packaging applications
- Enhanced Neural Processing Unit for safety providing 32,768 MACs/cycle of performance for AI applications
- Enhanced Neural Processing Unit for safety providing 49,152 MACs/cycle of performance for AI applications