MIMO IP

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Compare 33 IP from 15 vendors (1 - 10)
  • MIMO Radar Co-processor Engine
    • Low latency, low power and compact
    • Gives ECU headroom for track-to-object recognition and make safety decisions
    Block Diagram -- MIMO Radar Co-processor Engine
  • K-Best (4X4) MIMO Decoder
    • Fixed Depth K-Best Decoder (K=16)
    • Achieves close-to ML BER performance
    Block Diagram -- K-Best (4X4) MIMO Decoder
  • MIMO Sphere Decoder
    • Fixed Complexity Sphere Decoder providing fixed throughput
    • Achieves close-to ML BER performance
    • MATLAB and C model for – MIMO 2×2 and 4×4 – Can be modified to support other MIMO sizes – BPSK, 4-QAM, 16-QAM and 64-QAM
    • Efficient and optimized FPGA Architecture (4×4 MIMO, 16-QAM)
    Block Diagram -- MIMO Sphere Decoder
  • MIMO MMSE Decoder
    • Includes QR Decomposition, Dynamic scale and K-best Decoder
    • Fixed Depth K-Best Decoder (K=16)
  • MMSE MIMO Detector
    • Adaptable to different transmitter/receiver antenna configurations (e.g., 2x2, 2x4 or 4x4).
    • Support for different modulation schemes at run-time (QPSK, 16-QAM, 64-QAM, 256-QAM).
    • QR decomposition included.
  • K-Best MIMO Decoder
    • Fixed Depth K-Best Decoder (K=16)
    • Achieves close-to ML BER performance
    • Supports four synchronized streams with different QAM
  • K-Best (2X2) MIMO Decoder
    • Fixed Depth K-Best Decoder (K=16)
    • Achieves close-to ML BER performance
  • Software Defined Radio for high end 4G/ 5G and large MIMO application
    • 8x8 Transmit and Receive Antennas support
    • TI Multi-core communication processor, 1.2 GHz
    • 8 C66X DSP cores and 4 ARM cores
    • NOR flash – 32MB, NAND Flash – 512MB
  • 3GPP LTE MIMO Encoder
    • Compliant with 3GPP TS 36.211 Release 9
    • Implements layer mapping and pre-coding
    • Supports both transmit diversity and space division multiplexing schemes
    • Cyclic delay diversity option
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Semiconductor IP