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Search (212)
Compare 212 IP from 35 vendors (1 - 10)
  • 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
    • A TSMC 22nm Inline, Flip Chip compatible library with GPIO, ODIO, HDMI, LVDS, & Analog Cells.
    • This silicon-proven, flip chip compatible library in TSMC 22nm boasts a two speed GPIO: 75MHz and 150MHz.
    • The library also features a 5V ODIO. GPIO and ODIO cells have an orientation of NS and EW.
    Block Diagram -- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
  • HDMI - Ensures seamless video and audio transmission with HDMI standards
    • HDMI Verification IP validates HDMI controller functionality in SoC designs, ensuring compliance with HDMI standards like 1.4, 2.0, and 2.1. It verifies video/audio signal transmission, encryption, and data integrity for smooth multimedia experience.
    • The VIP also tests advanced features like 3D video, HDR, and deep color formats, ensuring compatibility across various devices. It simulates scenarios like hot-plug detection and HDCP for secure, error-free content transmission in diverse real-world applications.
    Block Diagram -- HDMI - Ensures seamless video and audio transmission with HDMI standards
  • Simulation VIP for HDMI
    • 3D – Capability
    • Supports various 3D video frame formats
    • 4K x 2K Resolution
    • Supports 4Kx2K video frame formats
    Block Diagram -- Simulation VIP for HDMI
  • HDMI 1.4/2.0/2.1 Verification IP
    • Protocol Checker fully compliant with HDMI Specification 1.4b, 2.0b and 2.1 compliant.
    • Full HDMI source and sink device functionality
    • Supports Video data coding.
    • Supports TERC4 coding and Control period codings.
    Block Diagram -- HDMI 1.4/2.0/2.1 Verification IP
  • HDMI 1.4/2.0/2.1 Synthesizable Transactor
    • Protocol Checker fully compliant with HDMI Specification 1.4b,2.0b and 2.1 compliant.
    • Full HDMI source and sink device functionality
    • Supports Video data coding.
    • Supports TERC4 coding and Control period codings.
    Block Diagram -- HDMI 1.4/2.0/2.1 Synthesizable Transactor
  • HDMI SOURCE IIP
    • Compliant with HDMI specification 1.4b/2.0b/2.1.
    • Full HDMI Source functionality.
    • Compatible with DVI and Dual-Link DVI Standards.
    • Supports 8, 10, 12 and 16 bit pixel inputs.
    Block Diagram -- HDMI SOURCE IIP
  • HDMI SINK IIP
    • Compliant with HDMI specification 1.4b/2.0b/2.1.
    • Full HDMI Sink functionality.
    • Compatible with DVI and Dual-Link DVI Standards.
    • Supports 8, 10, 12 and 16 bit pixel output.
    Block Diagram -- HDMI SINK IIP
  • HDMI eARC Transmitter IIP
    • Compliant with HDMI_eARC Transmitter protocol standard of HDMI version 2.1 specification
    • Full HDMI_eARC Transmitter functionality
    • Supports AXI4-Lite SOC interface
    • Supports AXI4 stream for audio interface
    Block Diagram -- HDMI eARC Transmitter IIP
  • HDMI eARC Receiver IIP
    • Compliant with HDMI_eARC Receiver protocol standard of HDMI version 2.1 specification
    • Full HDMI_eARC Receiver functionality
    • Supports AXI4-Lite SOC interface
    • Supports AXI4 stream for audio interface
    Block Diagram -- HDMI eARC Receiver IIP
  • HDMI CEC IIP
    • Supports HDMI-CEC version 1.4b and 2.0 specifications
    • CEC 2.0 is designed to be a backward compatible extension of CEC 1.4b
    • HDMI-CEC device supports full Initiator and Follower functionality.
    • Supports automatic synchronization to align sampling point.
    Block Diagram -- HDMI CEC IIP
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