A TSMC 22nm Inline, Flip Chip compatible library with GPIO, ODIO, HDMI, LVDS, & Analog Cells.
This silicon-proven, flip chip compatible library in TSMC 22nm boasts a two speed GPIO: 75MHz and 150MHz. The library also features a 5V ODIO. GPIO and ODIO cells have an orientation of NS and EW. The library’s HDMI cell features a 5 pad Macro cell that has VSS, VDD (3.3V tolerant) and two differential pair. The library’s LVDS cell features a 9 pad macro cell that has AVSS, AVDD, and differential pins for LVDS pairs and is 1.8V tolerant. The library is designed to provide ESD protection of 2kV HBM and 500V CDM. In silicon most of the I/Os pass >4kV HBM and >800V CDM, depending on package and product design. Latch-up immunity has passed >150mA.
Operating Conditions
| Parameter | Value |
| Core Device | 0.7V to 0.9V VDD |
| I/O Device | 1.8V |
| Core | Uses SVT/HVT/LVT |
| BEOL | 1P7M_5x1 |
| PAD | 50um pitch In-Line |
| Cell Height | 110um Analog/HDMI, 130um Digital |
| VDD Core | 0.7V/0.8V/0.9V |
| Tj | -40C to 125C |
| ESD | >2kV HBM, 500V CDM |
Library Cell Summary
| Cell Type | Feature |
| EG_IO | Operates at 150MHz, both NS & EW |
| EG_IO75 | Operates at 75MHz, both NS &EW |
| EG_IO_OD | Open-Drain I/O Pad, both NS & EW |
| EG_HDMI | Includes 2 diff. pins for HDMI |
| EG_AVDD | Analog 1.8V tolerant power supply |
| EG_LVDS18 | Includes 2 diff. pins for 2 LVDS pairs |
Standards
- I2C and I3C
- eMMC, SPI, SMBus
- DDC, CEC, LPDDR
- ONFI, SDIO, LVCMOS
- LPDDR
