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HBM2E IP

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Compare 30 IP from 7 vendors (1 - 10)
  • HBM2E Synthesizable Transactor
    • Supports 100% of HBM2E protocol standard JESD235B,JESD235C and JESD235D.
    • Supports all the HBM2E commands as per the specs
    • Supports all types of timing and protocol violation detection
    • Supports burst length of 2 and 4
    Block Diagram -- HBM2E Synthesizable Transactor
  • HBM2E DFI Synthesizable Transactor
    • Compliant with DFI version 4.0 or 5.0 Specifications.
    • Supports HBM2E devices compliant with JEDEC HBM2E DRAM Standard JESD235B and JESD235C.
    • Supports all Interface Groups.
    • Supports Write Transactions with Data mask
    Block Diagram -- HBM2E DFI Synthesizable Transactor
  • HBM2E Memory Model
    • Supports HBM2E memory devices from all leading vendors.
    • Supports 100% of HBM2E protocol standard specification JESD235B,JESD235C and JESD235D.
    • Supports all the HBM2E commands as per the specs.
    • Supports programmable clock frequency of operation.
    Block Diagram -- HBM2E Memory Model
  • HBM2E DFI Verification IP
    • Compliant with DFI version 4.0 or 5.0 Specifications.
    • Supports HBM2E devices compliant with JEDEC HBM2E DRAM Standard JESD235B and JESD235C.
    • Supports all Interface Groups.
    • Supports Write Transactions with Data mask
    Block Diagram -- HBM2E DFI Verification IP
  • HBM2E DFI Assertion IP
    • Specification Compliance
    • Compliant with DFI version 4.0 or 5.0 Specifications.
    • Supports HBM2E devices compliant with JEDEC HBM2E DRAM Standard JESD235B and JESD235C.
    • Supports all Interface Groups.
    Block Diagram -- HBM2E DFI Assertion IP
  • HBM2E Controller IIP
    • Supports HBM2E protocol standard JESD235B and JESD235C with revision 4.10 Specification.
    • Compliant with DFI version 4.0 or 5.0 Specification.
    • Supports up to 16 AXI ports with data width upto 512 bits.
    • Supports controllable outstanding transactions for AXI write and read channels.
    Block Diagram -- HBM2E Controller IIP
  • HBM2E Assertion IP
    • Specification Compliance
    • Supports HBM2E memory devices from all leading vendors.
    • Supports 100% of HBM2E protocol standard specification JESD235B,JESD235C and JESD235D.
    • Supports all the HBM2E commands as per the specs.
    Block Diagram -- HBM2E Assertion IP
  • HBM2E PHY V2 in TSMC (N7, N6, N5)
    • Low latency, small area, low power
    • Compatible with JEDEC standard HBM2/HBM2E SDRAMs
    • Data rates up to 2400 Mbps for HBM2 and 3600 Mbps for HBM2E
    • 4H and 8H HBM2/HBM2E SDRAM stacks supported
  • HBM2E PHY&Controller
    • Compliant with JESD235C HBM2E, up to 3200Mbps
    • Compliant with DFI 3.1 Specifications (dfi_clk_1x : wdqs = 1:2)
    • Support up to 8 Channel with 128 DQ width + Optional ECC pin support/channel
    • Support command and DQ parity
  • HBM2E Memory Controller
    • Support Pseudo Channel mode with 64DQ per Pseudo Channel
    • Support DFI1:2
    • Support HBM Burst Length 4
    • Support 4 High or 8 High HBM Devices
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