IP Catalog > CSI-2 Controller

CSI-2 Controller IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Search (285)
Compare 285 IP from 16 vendors (1 - 10)
  • MIPI CSI-2 Controller Core
    • Fully MIPI CSI-2 standard compliant
    • 64 and 32-bit core widths
    • Transmit and Receive versions
    • Supports 1-8, 9.0+ Gbps D-PHY data lanes
    • Supports 1-4, 6.0+ Gsym/s C-PHY lane (trio)
    • Supports all data types
    Block Diagram -- MIPI CSI-2 Controller Core
  • MIPI CSI-2 Host Controller
    • Supports key features of the latest MIPI CSI-2 specification
    • PPI interface to MIPI C-PHY v1.2 and D-PHY v2.1
    • Programmable multi-lane merging
    • Short and long packet format and all primary and secondary CSI-2 data formats
    Block Diagram -- MIPI CSI-2 Host Controller
  • MIPI CSI-2 RX Controller
    • The CSI-2 RX controller IP is optimized for low power, small size and high-speed interfaces, supporting a wide range of higher image resolutions.
    • The CSI-2 RX Controller IP is fully compliant with the CSI-2 v2.0 specification and supports the DPHY v2.0 and CPHY v1.2.
    Block Diagram -- MIPI CSI-2 RX Controller
  • MIPI CSI-2 RX Controller Subsystem
    • Support for 1 to 4 PPI Lanes
    • Line rates ranging from 80 to 1500 Mb/s
    • Multiple data type support (RAW,RGG,YUV)
    • AXI IIC support for CCI interface
  • MIPI CSI-2 TX Controller
    • Standards Compliance. CSI-2 v2.1, with 8-bit PPI data width and links with 1, 2, or 4 data lanes
    • Provides up to 4 Independent Stream Output Interfaces, allowing a highly configurable range of options, including multiple pixel modes, various buffering modes, packed data mode, Data Type selection, and Virtual Channel or Data Type interleaving
    Block Diagram -- MIPI CSI-2 TX Controller
  • MIPI CSI2 Transmit Controller
    • Camera Serial Interface (CSI-2) version 1.1
    • D-PHY version 1.1
    • CSI-2 interface on device side supports
    • AMBA APB Slave for Control and Status
    Block Diagram -- MIPI CSI2 Transmit Controller
  • MIPI CSI-2 RX Controller
    • Standards Compliant. CSI-2 v2.1, with 8-bit and 16-bit PPI data width and links with 1, 2, 4, or 8 data lanes
    • Provides up to 8 Independent Stream Output Interfaces, allowing a highly configurable range of options, including multiple pixel modes, various buffering modes, packed data mode, Data Type selection, and Virtual Channel or Data Type interleaving
    Block Diagram -- MIPI CSI-2 RX Controller
  • MIPI CSI-2 V4 Host Controller Stnd
    • Supports key features of the latest MIPI CSI-2 specification
    • PPI interface to MIPI C-PHY v1.2 and D-PHY v2.1
    • Programmable multi-lane merging
    • Short and long packet format and all primary and secondary CSI-2 data formats
    Block Diagram -- MIPI CSI-2 V4 Host Controller Stnd
×
Semiconductor IP