CCIX Controller IP

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Compare 37 IP from 2 vendors (1 - 10)
  • CCIX 32G Premium Controller with AMBA bridge II
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCIe 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Choice of datapath widths (128-bit, 256-bit, or 512-bit)
    • Supports cache-coherency as defined by the CCIX standard
    Block Diagram -- CCIX 32G Premium Controller with AMBA bridge II
  • CCIX 32G Premium Controller II
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCIe 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Choice of datapath widths (128-bit, 256-bit, or 512-bit)
    • Supports cache-coherency as defined by the CCIX standard
    Block Diagram -- CCIX 32G Premium Controller II
  • Configurable CCIX controllers for CCIX 32G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCI Express 5.0, 4.0, 3.1, 2.1 and 1.1 specifications
    • Supports up to sixteen 32.0 25.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
    • Available in 128-, 256- or 512-bit datapath widths for maximum flexibility
  • Configurable CCIX controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCI Express 5.0, 4.0, 3.1, 2.1 and 1.1 specifications
    • Supports up to sixteen 32.0 25.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
    • Available in 128-, 256- or 512-bit datapath widths for maximum flexibility
  • Controllers for CCIX 25G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications targeting automotive
    • Supports all required features of the CCIX 1.1 specification, including 32GT/s, and ESM support for 25GT/s and 20GT/s
    • Supports all required features of the PCI Express 5.0, 4.0, 3.1, 2.1 and 1.1 specifications
    • Supports up to sixteen 32.0 25.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
    • Available in 128-, 256- or 512-bit datapath widths for maximum flexibility
  • Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
    • Available in all port types including: Endpoint, Embedded Endpoint, Root Complex, Switch Port, Bridge, Dual Mode (Endpoint/Root Complex), and Multi-Port Switch
    • Full Transaction Layer, Data Link Layer and Physical Layer
    • Supports up to sixteen 64.0, 32.0, 16.0, 8.0, 5.0, 2.5 GT/s lanes
    • Available in 32-, 64-, 128-, 256-, 512- or 1024-bit datapath widths for maximum flexibility
  • PCIE Gen5 digital controller
    • Compliant with Pipe 5.x
    • The flexible and easy user interface
    • Compliant with ATS Specification
    • Compliant with SR-10v Specifications
  • 112G LR-Max Ethernet PHY for TSMC N5
    • Supports 1.25 to 112 Gbps data-rate
    • Supports PCI Express 6.0, 1G to 400G/800G Ethernet, CCIX, CXL, JESD204C, CPRI, SATA, and OIF CEI LR/MR/VSR Electrical Interfaces protocols
  • 25G PHY, TSMC N6 x2 North/South (vertical) poly orientation
    • Supports 1.25 to 25.8 Gbps data-rate
    • Supports PCI Express 4.0 with lane margining, 1G to 100G Ethernet, CCIX, and SATA protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC), ` PCIe Separate Refclk Independent SSC (SRIS) and power management features
    Block Diagram -- 25G PHY, TSMC N6 x2 North/South (vertical) poly orientation
  • 25G PHY, TSMC 7FF x4 North/South (vertical) poly orientation
    • Supports 1.25 to 25.8 Gbps data-rate
    • Supports PCI Express 4.0 with lane margining, 1G to 100G Ethernet, CCIX, and SATA protocols
    • Supports x1 to x16 macro configurations with aggregation and bifurcation
    • Spread Spectrum Clock (SSC), ` PCIe Separate Refclk Independent SSC (SRIS) and power management features
    Block Diagram -- 25G PHY, TSMC 7FF x4 North/South (vertical) poly orientation
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Semiconductor IP