802.3 IP
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305
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Gigabit Ethernet 802.3 MAC Controller IP
- Supports CPU local bus interface for controlling Ethernet MAC internal registers.
- Supports 32-bit memory local bus interface
- Comply with IEEE 802.3u MII interface.
- Support Reduced MII interface
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Gen-Z Physical Layer for 802.3 IP Core
- Full Verilog/SystemVerilog core
- Compliant with the Gen-Z 0.5d Physical Layer Specification
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Fast Ethernet 10/100 802.3 MAC with IEEE 1588 PTP Support
- General Functions:
- Transmit Functions:
- Receive Functions:
- Flow Control Functions:
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Gigabit Ethernet 802.3 MAC - Media Access Controller
- General Functions:
- Transmit Functions:
- Receive Functions:
- Flow Control Functions:
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IEEE 802.3 Clause 74 FEC
- The IP core supports encoding and decoding of the (2112,2080) Fire code defined in IEEE 802.3 Clause 74
- Suitable for 10GBASE-R, 25GBASE-R, 40GBASE-R, 50GBASE-R and 100GBASE-R Ethernet PHYs and 16G Fibre Channel PHYs
- Burst errors of up to 11 bits can be corrected
- All alignment, transcoding, and scrambling functions are performed within the core
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Fast Ethernet 802.3 Media Access Controller (MAC)
- General Functions:
- Transmit Functions:
- Receive Functions:
- Flow Control Functions:
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100G Reed-Solomon Codec for Ethernet IEEE 802.3 Clause 91 (803.3bj)
- FEC Sublayer for 100GBASE-CR4 and 100GBASE-KR4 PHY (clause 91 of the IEEE 802.3bj standard).
- 100G Ethernet MAC-friendly interface
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50G IEEE 802.3 Reed-Solomon Forward Error Correction
- Low latency
- Accessible as an integrated feature in the 50G Ethernet Subsystem
- Configuration and status bus
- Selectable AXI4-Lite interface for status output
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2.5G/1000M/100M/10M Quad-Mode MAC
- Proven IP reduces development time and risk
- Support 2.5Gbps, 1000Mbps, 100Mbps and 10Mbps PHY interfaces
- Support GMII and RGMII interface natively