64-bit RISC-V Processor IP
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High Performance 64-bit RISC-V Processor
- Dubhe-90 is a high-performance commercial RISC-V CPU Core IP that is deliverable.
- It adopts an 11+ stage and 5-issue pipeline, superscalar, and deep out-of-order execution, and supports standard RISC-V RV64GCBH extensions.
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Compact, efficient 64-bit RISC-V processor with 5-stage pipeline
- Support for RV32IM
- 5-stage pipeline
- Thirty-two 64-bit general purpose registers
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64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
- 64-bit in-order dual-issue 8-stage CPU core with up to 1024-bit Vector Processing Unit (VPU)
- Symmetric multiprocessing up to 8 cores
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64-bit RISC-V Application Processor Core
- High computational throughput with 7-stage pipeline and branch predictor
- Support for RISC-V single and double precision FPU
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64-bit RISC-V Application Processor Core
- 64-bit RISC-V core
- Linux capable
- In-order 7-stage pipeline
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64-Bit 8-stage superscalar RISC-V processor
- 64-bit in-order dual-issue 8-stage pipeline CPU architecture
- AndeStar™ V5 Instruction Set Architecture (ISA)
- 16/32-bit mixable instruction format for compacting code density
- Advanced low power branch predication to speed up control code
- Return Address Stack (RAS) to accelerate procedure returns
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High-performance 64-bit RISC-V architecture multi-core processor with AI vector acceleration engine
- Instruction set: RISC-V RV64GC/RV 64GCV;
- Multi-core: Isomorphic multi-core with 1 to 4 optional clusters. Each cluster can have 1 to 4 optional cores;
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64-bit embedded processor, fully compliant with the RISC-V ISA
- RV64IAC M + U Modes
- Up to 1.5 GHz in 28nm
- 1.8 DMIPS/MHz
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RISC-V Processor With Posits
- CPU Core built by integrating PNU with 64-bit RISC-V Processor
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64-bit RISC-V Single Core Microprocessor
- RISC-V 64G (RV64IMAFD) ISA
- 6 stage in-order pipeline implementation
- Advanced branch predictor: BTB, BHT, RAS
- Harvard architecture
