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SONET/SDH IP

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Search (17)
Compare 17 SONET/SDH IP from 8 vendors (1 - 10)
  • Quad GbE Over SONET/SDH
    • Encapsulates GbE frames into SONET/SDH protocol using packet-over SONET (POS) and simplified data link (SDL)
    • Quad OC-12c POS interface to the SONET/SDH network, each OC-12c carries one GbE data channel
    • Performs all SONET/SDH section, line, and path termination functions
    • Support for Jumbo Ethernet packets, up to 9.6 Kbytes
    Block Diagram -- Quad GbE Over SONET/SDH
  • SONET/SDH: OC48/STM-16 Framer
    • Source Direction
    • Support software programmable TOH bytes per bit with bit mask
    • Support external TOH insertion on all TOH bytes per bit with bit mask
    • Support software programmable on all POH bytes with bit mask
    Block Diagram -- SONET/SDH: OC48/STM-16 Framer
  • SONET/SDH: OC192/STM-64 Framer
    • Features
    • Source Direction
    • Support software programmable TOH bytes per bit with bit mask
    • Support external TOH insertion on all TOH bytes per bit with bit mask
    Block Diagram -- SONET/SDH: OC192/STM-64 Framer
  • SONET/SDH: OC12/4xOC3|STM-4/4xSTM-1 Framer
    • Source Direction
    • Support software programmable TOH bytes per bit with bit mask
    • Support external TOH insertion on all TOH bytes per bit with bit mask
    • Support software programmable on all POH bytes with bit mask
    Block Diagram -- SONET/SDH: OC12/4xOC3|STM-4/4xSTM-1 Framer
  • Universal G704-E1 Framer / Deframer Core
    • Asymmetric Application (e.g. E1 - ATM, nx64 - E1, E1 - 30 BRI-Channels)
    • Symmetric Application (e.g. E1-E1)
    • Multi G704 on Chip (e.g E1-E2)
    • Basic and Multiframe Alignment
    Block Diagram -- Universal G704-E1 Framer / Deframer Core
  • PoS Framer
    • Best-in-Class size and performance.
    • Multiple FPGA vendor support.
    • Available for the following SONET/SDH rates:
    • OC1/STM0, OC3/STM1, OC12/STM4, OC48/STM16, OC192/STM64
  • SONET/SDH Framer
    • Conforms to G.707, G.806, G.783 and T1.105
    • Interfaces to the following SONET/SDH links:
    • Performs frame generation, delineation and scrambling for one or multiple links.
    • Detects Loss of Signal (LOS), Out of Frame (OOF) and Loss of Frame (LOF) defects.
  • 2G5 GFP-T (CODEC)
    • Compliant with ITU-T G.7041 specification.
    • Best-in-Class size and performance. Multiple FPGA vendor support.
    • Accepts 64 byte blocks of data from an 8B/10B data source.
    • Encodes input blocks into 67 byte GFP-T blocks as per G.7041.
  • E1/T1 Mapper/Framer
    • Conforms to ITU G.704/ANSI T1.403.
    • Best-in-Class size and performance and supports many hundreds of channels.
    • Generates and performs frame synchronization for the following PDH signals: T1 – (ESF/SF), J1, E1 – (CRC/Non-CRC/ G.706 Interworking)
    • Calculates and inserts CRC; reports CRC values for T1 (ESF), J1 and E1.
  • SONET/SDH OC-3 / OC-12 Transceiver/CDR PHY
    • Fully integrated transceiver architectures that include: Clock synthesis, Clock Recovery, Wave shaping, low-jitter LVPECL interface, S/P/S functions.
    • High frequency PLLs with integrated on chip loop filters.
    • Supports 155.52 Mb/s (OC-3), 622.08 Mb/s (OC-12) with Selectable reference frequencies of 77.76 or 155.52 MHz.
    • LVPECL or LVDS circuitry for external interfacing to optical units.
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