General Purpose PLL IP for UMC
Welcome to the ultimate General Purpose PLL IP for UMC hub! Explore our vast directory of General Purpose PLL IP for UMC
All offers in
General Purpose PLL IP
for UMC
Filter
Compare
189
General Purpose PLL IP
for UMC
from 11 vendors
(1
-
10)
-
Phase-locked loop frequency synthesizer
- CMOS UMC 65 nm
- Integer-N frequency synthesizer with good phase noise performance
- Guaranteed frequency range 550…750 MHz
- Wide continuous loop frequency divider ratio range (16..2047 with step 1) allow to cover frequency range using different reference frequency
-
Ultra low power 32.768 kHz crystal oscillator
- UMC 55nm eFlash CMOS technology
- Input Voltage 1.2V
- Fixed 32.768kHz output frequency
-
Low Voltage, Low Power Fractional-N PLLs
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
-
Fractional-N PLLs for Performance Computing
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
-
Fractional-N PLL for Performance Computing in UMC40LP
- Low jitter, suitable for many clocking applications, including high speed digital, ADC, DAC, medium-speed PHY
- Extremely small die area (< 0.02 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 4GHz
- Reference clock from 10MHz to 500MHz
-
General Purpose Fractional-N PLLs
- Low power, suitable for logic clocking applications
- Extremely small die area, using a ring oscillator
- Twelve bits fractional resolution
-
High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
- Fractional-N digital PLL architecture, using an LC-tank oscillator
-
High Performance Fractional-N RF Frequency Synthesizer PLL in UMC 40LP
- Fractional-N digital PLL architecture, using an LC-tank oscillator
- Ultra-low jitter and ultra-low phase noise
-
4-GHz Jitter-optimized low-power digital PLL
- - Jitter below 10-ps
- - Super small: 90 x 90 microns!
- - Very low power: 15-mW
- - Broad frequency range: 4-GHz
-
Minimum-area low-power clocking PLL (1st gen)
- - Super small: 80 x 80 microns!
- - Very low power: 12-mW
- - Broad frequency range: 2-GHz
- - Fast lock
