LVDS IP for TSMC
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LVDS IP
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LVDS IP
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- 28nm
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LVDS Transceiver in TSMC 28nm
- This 1.8V LVDS transceiver, designed for TSMCs 28nm process, delivers high-speed, low-power differential signaling with superior signal integrity.
- Engineered with 1.8V thick oxide devices and a 0.8V standard core interface, it operates ef- ficiently across a wide temperature range (-40°C to 125°C).
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1.25 Gbps LVDS IPs library
- TSMC 28nm CMOS
- TIA/EIA-644 LVDS standards without hysteresis
- Data transfer rate: 1250Mbps
- 1.8V IO voltage supply
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IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- Certus offers dedicated 1.8V, 3.3V and switchable 1.8V/3.3V General-Purpose IO (GPIO) solutions.
- GPIO features include:
- I2C / SMBUS Open-Drain I/O features include:
- LVDS I/O features include:
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Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings
- I2C Open-drain
- Physical Features
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LVDS Receiver
- Wide frequency range:
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- Up to 10.5 Gbit/s bandwidth
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LVDS Transmitter
- Wide frequency range:
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- On-chip Input Jitter Filtering
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I/O Library
- Dolphin Technology offers an extensive array of Interface IP, all of whichhasbeen optimized for ultra high performance across all processes supported.
- Our I/O portfolio includes: Standard I/O (General Purpose I/O or GPIO), Specialty I/O (bus-specific I/O), NAND Flash I/O and DDRx & LPDDRx I/O.
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Camera 6/7-mode Combo Receiver - 1G/1.5Gbps
- The CL12684KM4-8-12-16R3AM6-7ZIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
- The CL12684KM4-8-12-16R3AM6-7ZIP is designed to support data rate in excess of maximum 1Gbps utilizing sub-LVDS / mini-LVDS / LVDS / HiSPi(SLVS-400, HiVCM) / MIPI-DPHY / CMOS-1.8V / CMOS-3.3V interface specification.
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High-voltage solutions in baseline GlobalFoundries and multi-foundry technologies
- High-Voltage ESD
- Physical Features