028TSMC_LVDS_01 is a library including:
• Transmitter LVDS driver (TX_LVDS);
• Receiver LVDS driver (RX_LVDS);
• Reduced range link receiver LVDS driver (RX_LVDS_R);
• Transceiver LVDS driver (RX_TX_LVDS);
• Reference current/voltage generators (RS_TOP);
• Bias block (LVDSBIAS8X) for 8 LVDS drivers
RX_TX_LVDS driver has five available operation modes: transmitter, receiver, transmitter half-duplex, receiver half-duplex and shutdown. The RS_TOP block is intended to output reference currents and voltage for RX_LVDS, RX_LVDS_R, TX_LVDS and TX_RX_LVDS drivers as well as for bias block. Composing of LVDS library components allows to design a device with up to 16 pairs of data channels and 2 pairs of synchronization channels.
1.25 Gbps LVDS IPs library
Overview
Key Features
- TSMC 28nm CMOS
- TIA/EIA-644 LVDS standards without hysteresis
- Data transfer rate: 1250Mbps
- 1.8V IO voltage supply
- 0.9V core voltage supply
- 0.9V CMOS input/output logic control signals
- 0.9V/1.8V level shifters
Applications
- Point-to-point data transmission
- Multidrop buses
- Clock distribution
- Backplane receiver
- Backplane data transmission
- Cable data transmission
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentationn
Technical Specifications
Foundry, Node
TSMC CMOS 28 nm
Maturity
pre-silicon verification
Availability
Now
TSMC
Pre-Silicon:
28nm