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General-Purpose I/O (GPIO) IP for TSMC

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Compare 13 General-Purpose I/O (GPIO) IP for TSMC from 5 vendors (1 - 10)
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  • 28nm
  • 1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+
    • The 1.2V Thin Gate GPIO is an IP macro for on-chip integration. It is a 1.2V general purpose I/O that does not rely on thick-gate devices. Only thin-gate, 0.9V capable core MOS devices are used in the design.
    • Supported features include core isolation, programmable slew rate compensation, programmable drive strength, input/output enable, pull select and pull enable. Extra features such as programmable hysteresis can be supported upon request.
    Block Diagram -- 1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+
  • 3.3V Capable GPIO on TSMC 28nm RF HPC+
    • The 3.3V capable GPIO is an IP macro for on-chip integration. It is a 3.3V general purpose I/O built with a stack of 1.8V thick oxide MOS devices. It is controlled by 0.9V (core) signals.
    • Supported features include core isolation, output enable and pull enable. Extra features such as input enable/disable, programmable drive strength and pull select, can be supported upon request.
    Block Diagram -- 3.3V Capable GPIO on TSMC 28nm RF HPC+
  • 1.8V Capable GPIO on Samsung Foundry 4nm FinFET
    • The 1.8V capable GPIO is an IP macro for on-chip integration. It is a 1.8V general purpose I/O built with a stack of 1.2V MOS FINFET devices. It is controlled by 0.75V (core) signals.
    • Supported features include core isolation, output enable and pull enable. Extra features such as input enable/disable, programmable drive strength and pull select, can be supported upon request.
    Block Diagram -- 1.8V Capable GPIO on Samsung Foundry 4nm FinFET
  • 1.8V/3.3V Multi-Voltage GPIO in TSMC 28nm
    • This silicon-proven TSMC 28nm Digital I/O Library delivers a high-performance, low-power interface solution designed for advanced digital applications.
    • Featuring a triple-staggered architecture, this versatile library supports multi-voltage and multi-protocol GPIO, ensuring seamless integration across diverse system requirements.
    Block Diagram -- 1.8V/3.3V Multi-Voltage GPIO in TSMC 28nm
  • 1.8V/3.3V Switchable GPIO in TSMC 28nm
    • A TSMC 28nm Wirebond I/O Library with a switchable 1.8V/3.3V GPIO, with Specialized RF Wirebond Cells for LNAs.
    • A key attribute of this silicon-proven, inline library is to detect and adjust to a VDDIO supply of 1.8V or 3.3V during system operation.
    • The GPIO can be configured as input, output, open-source, or open-drain with an optional 60kohm pull-up or pull-down resistor.
    Block Diagram -- 1.8V/3.3V Switchable GPIO in TSMC 28nm
  • RGMII I/O offerings
    • RGMII
    • Physical Features
    Block Diagram -- RGMII I/O offerings
  • A 28nm 1.8V-3.3V Fail-Safe General-Purpose IO & OSC
    • Fail-Safe GPIO in TSMC 28nm process technology
    • Physical features
    • This library also features a 33MHz OSC (3.3V).
    Block Diagram -- A 28nm 1.8V-3.3V Fail-Safe General-Purpose IO & OSC
  • Secure Digital I/O offerings
    • Secure Digital
    • Physical Features
    Block Diagram -- Secure Digital I/O offerings
  • Block Diagram -- Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings
  • I/O Library
    • Dolphin Technology offers an extensive array of Interface IP, all of whichhasbeen optimized for ultra high performance across all processes supported.
    • Our I/O portfolio includes: Standard I/O (General Purpose I/O or GPIO), Specialty I/O (bus-specific I/O), NAND Flash I/O and DDRx & LPDDRx I/O.
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