I/O Library IP for TSMC
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28
I/O Library IP
for TSMC
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- 7nm
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Differential Signal Receiver on TSMC CLN7FF
- Differential IO clock receiver
- Single-ended output to chip core
- AC coupled input structure to allow a wide range of input common mode voltages
- Wide Ranges of input frequencies up to 2000MHz for diverse clocking needs
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Differential Output Driver on TSMC CLN7FF
- Differential output to chip core
- Wide frequency range support up to 2000MHz output for diverse clocking needs
- Implemented with Analog Bits’ proprietary architecture
- Low power consumption
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CML Buffer on TSMC CLN7FF
- CML differential buffer for on-chip applications
- Wide Ranges of input frequencies for diverse clocking and data needs
- Implemented with Analog Bits’ proprietary architecture
- Requires no additional on-chip components or band-gaps, minimizing power consumption
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C2C IO Buffer on TSMC CLN7FF
- Single-Ended CMOS IO
- DC to 1Gb/s operation
- Core voltage CMOS signaling
- Low power consumption
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1.8V General Purpose I/O Pad Set
- Bidirectional GPIO Driver Features
- In full-drive mode, this driver can operate to frequencies in excess of 100MHz with 15pF external load and 125 MHz with 10pF load. Actual frequency limits are load and system dependent. A maximum of 200 MHz can be achieved under small capacitive loads.
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3.3V Wide-Range General Purpose Inline I/O Pad Set
- Bidirectional GPIO Driver Features
- ? Multi-Voltage (1.2V, 1.8V, 2.5V, 3.3V)
- ? LVCMOS / LVTTL input with selectable hysteresis
- ? Programmable drive strength (rated 2mA to 12mA)