ESD Protection IP for TSMC
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ESD Protection IP
for TSMC
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17
ESD Protection IP
for TSMC
from 2 vendors
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10)
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- 7nm
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High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option
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Small area rail clamp for FinFET
- Power clamp ESD solutions
- Rail clamp ESD protection
- 0.75V domain
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Analog I/O - low capacitance, low leakage
- Scalable robustness
- Area efficient
- low capacitance option
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on-chip ESD protection
- Analog I/Os
- ESD Power protection
- Ground pads
- ESD protection cells
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On-chip protection against IEC61000-4-2 events
- Analog Pads
- Power Pads
- Ground Pads
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1.8V General Purpose I/O Pad Set
- Bidirectional GPIO Driver Features
- In full-drive mode, this driver can operate to frequencies in excess of 100MHz with 15pF external load and 125 MHz with 10pF load. Actual frequency limits are load and system dependent. A maximum of 200 MHz can be achieved under small capacitive loads.
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3.3V Wide-Range General Purpose Inline I/O Pad Set
- Bidirectional GPIO Driver Features
- ? Multi-Voltage (1.2V, 1.8V, 2.5V, 3.3V)
- ? LVCMOS / LVTTL input with selectable hysteresis
- ? Programmable drive strength (rated 2mA to 12mA)
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1.8V General Purpose I/O Staggered Pad Set
- Bidirectional GPIO Driver Features
- ? Multi-Voltage (1.2V, 1.5V, 1.8V)
- ? LVCMOS / LVTTL input with selectable hysteresis
- ? Programmable drive strength (rated 2mA to 12mA)
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ESD Protection
- ESD Protection: