ROM IP for TSMC
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23
ROM IP
for TSMC
from 3 vendors
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10)
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TSMC 0.15umLV Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
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sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
- REDUCE DIE COST
- Via 1 programmable ROM
- Key patent for high density with a single programming layer
- Gain in density over alternative ROM designs
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Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k
- Foundry sponsored memory generator
- For nominal voltage characterization corner
- Power reduction features
- Up to 50% gain in dynamic power consumption compared to standard ROM
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Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 1024 k
- Ultra-low-leakage even in a generic process
- No leakage in memory plane
- Minimal leakage in memory periphery while achieving between 230 and 300 MHz in worst case in TSMC 90 nm LP !
- Key patent for high density with only one programming layer
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Metal programmable ROM compiler - Memory optimized for low power - compiler range up to 256 k
- Power reduction features
- Decrease of packaging cost
- Smaller SoC area
- Decrease of fabrication costs
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Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Ultra low dynamic power
- Decrease of packaging cost
- Smaller SoC area
- 45% less consuming than conventional metal or via ROM at nominal voltage
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Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Ultra low dynamic power
- Decrease of packaging cost
- Smaller SoC area
- 45% less consuming than conventional metal or via ROM at nominal voltage
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Metal programmable ROM compiler - Memory optimized for low power - Dual Voltage - compiler range up to 1024 k
- Power reduction features
- Dual voltage capability
- Designed to minimize power consumption
- Decrease of fabrication costs