Overview
Foundry sponsored - sROMet compiler - TSMC 55 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Performances
|
Variants
|
VT Bit cell
|
VT Periphery
|
Operating Voltage
|
Capacity
|
Option mode
|
|
55 uLP eFlash
|
Dolphin bit cell
SVT |
SVT |
Nominal voltage:
1.2 V +/-10%
Low voltage:
0.9 V +/-10%
|
512 bits - 0.5 Mbits |
- |
Key Features
REDUCE DIE COST
- Via 1 programmable ROM
- Key patent for high density with a single programming layer
- Gain in density over alternative ROM designs
EXTEND BATTERY LIFE
- Significant gain in dynamic power consumption compared to alternative ROM
- No leakage in memory plane and minimal leakage in memory periphery
MAKE INTEGRATION EASIER
- Depending on memory capacity. A large number of MUX options can be selected between 8 and 128
- High flexibility for address range
ENABLE RIGHT ON FIRST PASS DESIGN
- Complete mismatch validation of the memory architecture taking in account local and global dispersion
Technical Specifications
Short description
sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
Vendor
Vendor Name
Foundry, Node
TSMC 55 nm uLPeFlash
Maturity
Pre-silicon
TSMC
Pre-Silicon:
55nm
ULP