Will your next ASIC ever be an FPGA?
June 14, 2012
Just over a week ago, I moderated a live webinar on EDN titled “When is an FPGA more Appropriate than an ASIC?” The participants were from Xilinx, Altera and Cadence. A repeat event was held at DAC, which I almost moderated, but because of DAC rules I was disqualified because I was also moderating the panel “Can one system model serve everybody?” Richard Goering did a nice write-up of this panel which you can find here.
So Kevin Morris performed the honors. He started by saying that we have heard this story so many times before after each new generation of FPGA is announced.
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