What's a memory booster, and how does it ease SoC bottlenecks
By Majeed Ahmad, EDN
What is a memory booster? It’s not another memory but a patented technology that doubles the capacity and bandwidth by employing ultra-tuned compression/decompression accelerators on the data path between the processor and the main memory. The data is compressed when fetched from memory, so the memory access latency is often shorter. That can deliver up to 50% more performance per watt, a crucial advantage for system-on-chips (SoCs) in servers and data centers.
The memory booster IP can be integrated into an SoC device by using the existing on-chip bus protocols. The IP block is placed on the memory access path and is invisible to the operating system and applications.
To read the full article, click here
Related Semiconductor IP
Related Blogs
- Will your multicore SoC hit the memory wall? Will the memory wall hit your SoC? Does it matter?
- What's it take to design DDR4 into your next SoC? Newly released DFI 3.0 Spec opens the flood gates for DDR4 design
- Solve SoC Bottlenecks with Smart Local Memory in AI/ML Subsystems
- LPDDR6: A New Standard and Memory Choice for AI Data Center Applications
Latest Blogs
- A Low-Leakage Digital Foundation for SkyWater 90nm SoCs: Introducing Certus’ Standard Cell Library
- FPGAs vs. eFPGAs: Understanding the Key Differences
- UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
- RT-Europa: The Foundation for RISC-V Automotive Real-Time Computing
- Arm Flexible Access broadens its scope to help more companies build silicon faster