Unleashing the Potential of RISC-V: A Recap of the SiFive Tech Forum
As the inventors of RISC-V and performance density leaders, SiFive is committed to spreading the word about how this groundbreaking open architecture is reshaping the computing industry and ushering in new possibilities. Last week, we hosted the SiFive Tech Forum in Hsinchu, the technology heart of Taiwan, to bring together hardware engineers, developers, and other technology leaders to talk about the incredible momentum of RISC-V to-date and how SiFive is leading the RISC-V revolution. The event was well over subscribed, which highlighted the eagerness with which the attendees were keen to learn about the latest SiFive solutions. Read on to find out more about what we covered during the SiFive Tech Forum.
To read the full article, click here
Related Semiconductor IP
- Multi-core capable 64-bit RISC-V CPU with vector extensions
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
- 32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
- All-In-One RISC-V NPU
Related Blogs
- SiFive HiFive: The Vital Role of Development Boards in Growing The RISC-V Ecosystem + HiFive Premier P550 Update
- Announcing the launch of CHERI Alliance: A unified front against digital threats
- SiFive Storage Solutions: Powering the Next Generation of SSD
- The Role of GPU in AI: Tech Impact & Imagination Technologies
Latest Blogs
- MIPI CCI over I3C: Faster Camera Control for SoC Architects
- aTENNuate: Real-Time Audio Denoising
- From guesswork to guidance: Mastering processor co-design with Codasip Exploration Framework
- Enabling AI Innovation at The Far Edge
- Unleashing Leading On-Device AI Performance and Efficiency with New Arm C1 CPU Cluster