UCIe: Enabling the Chiplet-Based Ecosystem
Universal Chiplet Interconnect Express (UCIe) is a novel specification that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level.
What Is a Chiplet?
A chiplet is a tiny integrated circuit (IC) with a well-defined specific functionality. One can relate this to LEGO building blocks for creating large structures.
Why Do We Need a Chiplet-Based Design?
Modern designs require high-performance computation feasible through lower nanometers (5-7nm), but still, most part of the design gives better performance with older nodes(16-28nm). The chiplet-based design approach opens opportunities to combine chiplets from different process nodes into the same package. This even results in cost reductions of specialized chips.
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter
- UCIe Die-to-Die Chiplet Controller
- Verification IP for UCIe
- UCIe Die-to-Die Controller IP
- UCIe Die-to-Die PHY
Related Blogs
- UCIe Heralds a Robust Chiplet Ecosystem for a New Era of SoC Innovation
- Enabling the Global 800G Ecosystem with 112G Ethernet PHY IP
- Advancing Die-to-Die Connectivity: The Next-Generation UCIe IP Subsystem
- SiFive HiFive: The Vital Role of Development Boards in Growing The RISC-V Ecosystem + HiFive Premier P550 Update
Latest Blogs
- lowRISC Tackles Post-Quantum Cryptography Challenges through Research Collaborations
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison
- Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V Power