Silicon Hive CTO: How Transaction-Based Acceleration Speeds IP Verification And Prevents TV "Crashes"
Jeroen Leijten is Chief Technology Officer for Silicon Hive, a Dutch company that has quickly become one of the world's leading intellectual property (IP) providers of imaging and video processing solutions for rapidly changing market segments such as connected, interactive digital televisions and smart phones. Silicon Hive programmable parallel system solutions are licensed by semiconductor companies such as Samsung, LSI and Intel. Silicon Hive engineers recently implemented a use model called"transaction-based acceleration" (TBA) with the Cadence Palladium III accelerator/emulator to verify some of Silicon Hive's most advanced multimedia system IP solutions (including hardware and software). Jeroen recently sat down to talk with us about his team's work.
To read the full article, click here
Related Semiconductor IP
- Very Low Latency BCH Codec
- 5G-NTN Modem IP for Satellite User Terminals
- 400G UDP/IP Hardware Protocol Stack
- AXI-S Protocol Layer for UCIe
- HBM4E Controller IP
Related Blogs
- AI-Based Sequence Detection for IP and SoC Verification & Validation
- Industry's First Verification IP for Arm AMBA CHI-G
- Verifying CXL 3.1 Designs with Synopsys Verification IP
- Industry's First Verification IP for PCIe 7.0
Latest Blogs
- Imagination Demonstrates DirectX Gaming on D-Series GPUs
- Embedded Security explained: Post-Quantum Cryptography (PQC) for embedded Systems
- Accreditation Without Compromise: Making eFPGA Assurable for Decades
- Synopsys Delivers First Complete UFS 5.0 and M‑PHY v6.0 IP Solution for Next‑Gen Storage
- World First: Synopsys MACsec IP Receives ISO/PAS 8800 Certification for Automotive and Physical AI Security