The High-Speed Virtual Highway
September 23, 2011
By now it’s safe to say that complex, high-speed design is no longer a riddle….at least in theory.
We all know the end game. In its most fundamental form, isn’t it really a designer’s negotiation and compromise with the end user that comes down to action and reaction? We know users demand more and more applications to run simultaneously on their smart devices. We know that the underlying SoC in every device must sufficiently accommodate multiple data streams for each unique application. This is driving key architectural decisions for multi-core, multi-processor SoCs. Given that, how do we limit the amount of ‘compromise’ by the designer and give the customer more of that they want?
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related Blogs
- Using Scoreboards and Virtual Platforms for Software Verification
- Creating the Zynq Virtual Platform, Including Errata
- The Zynq Virtual Platform: Not Just for Pre-Silicon
- Using Physical USB Devices with the Xilinx Zynq-7000 Virtual Platform