Synopsys Integration Challenges with SpringSoft Acquisition
Another week in EDA and yet another acquisition by Synopsys as they buy SpringSoft this time for $406 million in cash. Paul McLellan wrote a good blog on this merger too.
Last week I blogged about the product overlap and integration challenges that Synopsys faces with the acquisition of Ciranova.
Let's take a look at the IC entry and layout products from SpringSoft and how they fit into the tools that Synopsys already owns:
Related Semiconductor IP
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
- High Speed Ether 2/4/8-Lane 200G/400G/800G PCS
Related Blogs
- Navigating Integration Challenges for the RISC-V Ecosystem with Networks-on-Chips (NoCs)
- Challenges in chip integration
- Reduce Integration Risks for High-Speed Applications with PCIe 5.0-Compliant Synopsys IP
- Key Considerations for Addressing Multi-Die System Verification Challenges
Latest Blogs
- Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications
- Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
- Quintauris: Accelerating RISC-V Innovation for next-gen Hardware
- Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?