Semico's list of 10 reasons why it’s taken so long for SoC design teams to adopt IP. How many apply to your team?
February 4, 2011
For those of us who formerly purchased IP in the form of 40-pin DIPs, the idea of using IP to design SoCs isn’t so foreign. However, for people accustomed to designing everything under the hood of their latest ASIC, the idea has seen surprisingly slow adoption. Semico’s new IP report, “IP Subsystems: The New IP Market Paradigm,” lists 10 reasons for the slow uptake. With author Rich Wawrzyniak’s kind permission, I have decided to list them here.
Related Semiconductor IP
- SLVS Transceiver in TSMC 28nm
- 0.9V/2.5V I/O Library in TSMC 55nm
- 1.8V/3.3V Multi-Voltage GPIO in TSMC 28nm
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
- ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
Related Blogs
- The Arm Ecosystem: More than Just an Ecosystem, it's Oxygen for SoC Design Teams
- Some critical considerations for SoC and Silicon Realization teams thinking about using ARM Cortex-A7 or ARM Cortex-A8 processor cores
- Why SoC Design Teams Still Struggle in a Connected World
- SOC Design Techniques that Enable Autonomous Vehicles
Latest Blogs
- Half of the Compute Shipped to Top Hyperscalers in 2025 will be Arm-based
- Industry's First Verification IP for Display Port Automotive Extensions (DP AE)
- IMG DXT GPU: A Game-Changer for Gaming Smartphones
- Rivos and Canonical partner to deliver scalable RISC-V solutions in Data Centers and enable an enterprise-grade Ubuntu experience across Rivos platforms
- ReRAM-Powered Edge AI: A Game-Changer for Energy Efficiency, Cost, and Security