RISC-V to the Core: New Horizons
The increasing popularity of the RISC-V ISA within the semiconductor industry is a boon for innovation. It provides designers with unprecedented flexibility and will slowly but steadily challenge and transform the current landscape of embedded systems. In the past, Renesas has embraced RISC-V technology introducing 32-bit ASSP devices for voice-control and motor-control built on CPU cores developed by Andes Technology Corp.
The exciting next step is the availability of the first, in-house engineered, CPU core. A high-level block diagram of the CPU is shown below:
But what‘s so special about it? First, this CPU is suitable for many different application contexts. It can be used as main CPU or to manage an on-chip subsystem or even to be embedded in a specialized ASSP device. Clearly it is very flexible. Second, the implementation is very efficient in terms of silicon area, which helps reduce operating current and leakage current during standby time, besides the obvious effect of smaller cost impact. Third, despite targeting small embedded systems, it provides a surprisingly high level of computational throughput to fulfill the increasingly demanding performance requirement of even deeply embedded applications.
To read the full article, click here
Related Semiconductor IP
- MIPI I3C Master RISC-V based subsystem
- ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
- RISC-V CPU IP
- RISC-V Vector Extension
- RISC-V Real-time Processor
Related Blogs
- Ambient IoT: 5 Ways Packetcraft's Software is Optimized to Enable the New Class of Connectivity
- SiFive Upgrades Automotive Security for the RISC-V Ecosystem with New ISO/SAE 21434 Certification
- Imec and Synopsys Lower the Barriers to 2nm Technology With New Pathfinding Design Kit
- Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
Latest Blogs
- CEO Interview with Cyril Sagonero of Keysom
- Cycuity Partners with SiFive and BAE Systems to Strengthen Microelectronics Design Supply Chain Security
- Cadence Unveils the Industry’s First eUSB2V2 IP Solutions
- Half of the Compute Shipped to Top Hyperscalers in 2025 will be Arm-based
- Industry's First Verification IP for Display Port Automotive Extensions (DP AE)