Renesas Collaborates on Large Language Model Generative AI Chip Design
Renesas and Cadence have been collaborating for several years, combining their expertise to drive advancements in chip design. Their partnership has been instrumental in creating innovative solutions that address the complex challenges faced by chip designers in today's rapidly evolving technological landscape. Most recently, the collaboration has focused on generative AI and its impact on semiconductor quality and design team productivity. They are also early adopters of Cadence Generative AI solutions, including Cadence Cerebrus for chip implementation, Verisium AI-driven verification, and the Cadence Joint Data and AI (JedAI) Platform.
The world of generative AI is evolving rapidly! I'm now a regular user of ChatGPT for various projects at work and home. At Cadence, we are seeing a dramatic uptick in adopting our JedAI generative AI solution. We recently announced the industry's first large language model (LLM) for chip design (a proof of concept project named ChipGPT) and the OrCAD X Platform for PCB design, optimized for small and medium businesses
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