No reason for FD-SOI Roadmap to follow Moore's law!
We in Semiwiki are writing about FD-SOI since 2012, describing all the benefits offered by the technology in term of power consumption, price per performance compared with FinFET, etc. Let me assess again that I am fully convinced that FD-SOI is a very smart and efficient way to escape from the Moore's law paradox: the transistor cost is increasing for (FinFET) technology node below 20 nm, and that I expect FD-SOI to see market adoption.
But I think that some people are confused when dealing with FD-SOI. When you see some picture like this "SOI Roadmap" (from VLSIResearch), it seems that the picture designer has just made a copy of the Bulk Roadmap and pasted it with 2 years shift. Even if 28 and 22 nm FD-SOI become successful technologies –that I hope- it will take some time for the foundries supporting these nodes to generate enough ROI before investing in a way as described on this graphic.
To read the full article, click here
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
- P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
Related Blogs
- 28 nm - The Last Node of Moore's Law
- 28nm Was Last Node of Moore's Law
- Moore's Law is not Dead
- Moore’s Law and 40nm Yield
Latest Blogs
- Why What Where DIFI and the new version 1.3
- ML-DSA explained: Quantum-Safe digital Signatures for secure embedded Systems
- Efficiency Defines The Future Of Data Movement
- Why Standard-Cell Architecture Matters for Adaptable ASIC Designs
- ML-KEM explained: Quantum-safe Key Exchange for secure embedded Hardware