MIPI UniPro: Major Differentiating Features, Benefits and Verification Challenges
October 14, 2015
MIPI UniPro is a recent addition to mobile chip-to-chip interconnect technology. It’s got many useful features to meet the requirements of mobile applications. That’s perhaps why Google’s Project Ara has selected MIPI UniPro and MIPI M-PHY as its backbone interconnects.
In this blog post, we describe three differentiating features, benefits and their verification challenges. All the discussion is referenced to MIPI UniPro 1.6.
- Achieving Low power consumption through Power mode changes and hibernation
- Flexibility in chip-to-chip lane routing through Physical Lane mapping
- Enhanced QoS through CPort arbitration & Data link layer pre-emption
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
- HYPERBUS™ Memory Controller
- AV1 Video Encoder IP
Related Blogs
- MIPI UniPro through eyes of PCI Express
- MIPI UniPro: Comprehensive Verification Checklist
- MIPI Unipro Transport Layer (L4) - An Introduction
- Technical Comparison: MIPI UniPro 1.6 vs MIPI UniPro 1.41
Latest Blogs
- Cadence Extends Support for Automotive Solutions on Arm Zena Compute Subsystems
- The Role of GPU in AI: Tech Impact & Imagination Technologies
- Time-of-Flight Decoding with Tensilica Vision DSPs - AI's Role in ToF Decoding
- Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry’s Transformation to Software-Defined Vehicles
- Deep Robotics and Arm Power the Future of Autonomous Mobility