Managing NVME Verification Complexity
From inception, NVMe was designed to support multiple hosts accessing shared media. Early implementation included PCIe in-the-box devices such as Endpoint(EP), Root complex(RC) and Root complex integrated endpoint(RCiEP); over time, Cloud and Storage infrastructure created a need for remote storage.
NVMe implementation can address space occupied by both SATA point-to-point architecture and SAS. Successful adoption in both spaces is due to the promise of low latency and a common interface for storage, regardless of location. Though the verification challenges in these two use cases are similar, they still require a different thought process.
To read the full article, click here
Related Semiconductor IP
- NVMe Verification IP
- NVMe 2.0 Verification IP
- Inline cipher engine for PCIe, CXL, NVMe, 5G FlexE link integrity and data encryption (IDE) using AES GCM mode
- NVMe expansion
- Xilinx Kintex 7 NVME HOST IP
Related Blogs
- NVMe VIP: Verification Features
- Keeping up with NVMe Technology Through Compliance Testing and Pre-Production Verification
- Navigating the Complexity of Address Translation Verification in PCI Express 6.0
- Semiconductor IP complexity