NVMe storage-optimized PCIe interface gets an Interoperability Lab at University of New Hampshire
The drive to adopt NVMe (a storage-optimized variant of the PCIe interface standard for SSDs) led by the NVMe Work Group now has an interoperability lab at the University of New Hampshire.
To read the full article, click here
Related Semiconductor IP
- NVM Express (NVMe) Controller (compliant with NVMe 1.4 Base Specification)
- Universal NVM Express Controller (UNEX)
- NVM Express IP Core
Related Blogs
- New Synopsys Report Highlights Key Industry Insights on the Impact of Multi-Die Systems
- New Distributed Simulation Technology for Faster Simulation of Multi-Die Systems
- Ambient IoT: 5 Ways Packetcraft's Software is Optimized to Enable the New Class of Connectivity
- The Importance of Ecosystem Cooperation for Interoperability
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview