How to Use the AXI VIP Debug Port
March 6, 2015
VIP manager Tushar Mattu of Synopsys gives insights on how to effectively use the AXI VIP Debug Port
Related Semiconductor IP
- SHA-256 Secure Hash Algorithm IP Core
- EdDSA Curve25519 signature generation engine
- DeWarp IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
Related Blogs
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Evolution of AMBA AXI Protocol: An Introduction to the Issue L Update
- The 5 Biggest Challenges in Modern SoC Design (And How to Solve Them)
- Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs
Latest Blogs
- Area, Pipelining, Integration: A Comparison of SHA-2 and SHA-3 for embedded Systems.
- Why Your Next Smartphone Needs Micro-Cooling
- Teaching AI Agents to Speak Hardware
- SOCAMM: Modernizing Data Center Memory with LPDDR6/5X
- Bridging the Gap: Why eFPGA Integration is a Managed Reality, Not a Schedule Risk