Tips on Using e Macros to Raise Abstraction and Facilitate Reuse
As my colleague Hilmar van der Kooij noted in a previous post, e's "defined as computed" macro capability is a great way to condense repetitive blocks of code into a few easy to read, parameterized lines. Building on Hilmar’s practical introduction, I’m going to ask you to take a step back and look at macros in broader context: specifically, consider that macros allow you to effectively introduce your own language constructs in an almost unlimited way. Whether you stick with a purely practical view of macros, or accept this proposed conceptual view, the benefits are the same: macros are a very powerful tool to help to raise the level of abstraction and facilitate reuse of your testbench.
To read the full article, click here
Related Semiconductor IP
- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G AX (e.g., AI)
- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G DX
- 200G/400G/800G Ethernet PCS/FEC
- 50G/100G MAC/PCS/FEC
- 25G/10G/SGMII/ 1000BASE-X PCS and MAC
Related Blogs
- Why your Internal IP Reuse Strategy is not Working
- The realities of IP reuse
- How Will High-Level Synthesis Affect the Make vs. Buy vs. Re-use Decision?
- What Does it Take to Migrate from e to UVMe?