Azure for Silicon Design with Cadence and TSMC
I used to live on the Cote d'Azur, which is what everyone else calls the French Riviera. The name comes from the blue color of the Mediterranean Sea, azur in French. In English, it is azure. But it is probably more well-known today as the name of Microsoft's Cloud business. Ironically, the dictionary definition of the color azure is "bright blue in color, like a cloudless sky."
At last week's TSMC OIP Ecosystem Forum, the invited keynote was by Kushagra Vaid of Microsoft titled Modernizing Silicon Development Using the Cloud. He also gave the invited keynote at CDNLive Silicon Valley in 2017. See my post Microsoft CDNLive Keynote: Cloudy with a Chance of Chips for what he said then. He is GM for Azure Infrastructure for Cloud+AI. Perhaps more importantly for this audience is that he spent a dozen years as a chip designer at Intel. As he said at the CDNLive keynote "I've used plenty of Cadence tools."
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