英特尔在其 Nios FPGA 处理器中使用RISC-V构架
By Nick Flaherty, eeNews Europe (October 06, 2021)
Intel's Nios V soft processor for its FPGAs uses the RISC-V: RV32IA architecture with atomic extensions, 5-stage pipeline and AXI4 interfaces.
Intel has developed a soft IP microcontroller core for its FPGAs using the oipen source RISV-V instruction set
The Nios V processor is the next generation of soft processor for Intel’s Cycline, Stratix and Aria FPGAs based on the open-source RISC-V Instruction Set Architecture. This processor is available in the Intel Quartus Prime Pro Edition Software starting with version 21.3. This follows the 32bit Nios II, launched over a decade ago by Altera in Quartus 8.
Related Semiconductor IP
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- ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
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