Intel backs RISC-V for Nios FPGA processor
By Nick Flaherty, eeNews Europe (October 06, 2021)
Intel's Nios V soft processor for its FPGAs uses the RISC-V: RV32IA architecture with atomic extensions, 5-stage pipeline and AXI4 interfaces.
Intel has developed a soft IP microcontroller core for its FPGAs using the oipen source RISV-V instruction set
The Nios V processor is the next generation of soft processor for Intel’s Cycline, Stratix and Aria FPGAs based on the open-source RISC-V Instruction Set Architecture. This processor is available in the Intel Quartus Prime Pro Edition Software starting with version 21.3. This follows the 32bit Nios II, launched over a decade ago by Altera in Quartus 8.
To read the full article, click here
Related Semiconductor IP
- 32 Bit - Embedded RISC-V Processor Core
- ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
- ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
Related News
- Intrinsic ID Announces Embedded SRAM PUF Security IP for Military-Grade IP protection in Intel FPGAs
- Intel Launches Agilex 7 FPGAs with R-Tile, First FPGA with PCIe 5.0 and CXL Capabilities
- Andes Technology and Spacetouch Collaborate to Unveil High-Tech Edge-Side AI Audio Processor Featuring the Powerful RISC-V AndesCore™ D25F
- Microchip's Low-Cost PolarFire® SoC Discovery Kit Makes RISC-V and FPGA Design More Accessible for a Wider Range of Embedded Engineers
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing