32-bit RISC-V processor IP
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ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
- 32-bit RISC-V embedded CPU with balanced 3-stage pipeline
- DSP implementation to extend the RISC-V baseline (RMX-100D)
- 2 KB to 64 KB instruction L1 cache
- Up to 2MB instruction and data closely coupled memory (CCM)
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ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
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ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
- 32-bit RISC-V embedded CPU with a 5-stage pipeline
- DSP implementation to extend the RISC-V baseline (RMX-500D)
- 2 KB to 64 KB instruction & data L1 caches
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32-bit RISC-V processor specifically designed for the Automotive and Functional Safety markets
- 32-bit RISC-V ISA
- ASIL B and ASIL D area optimised product variants
- Functional Safety Package and Independent Assessment
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High performance 32-bit RISC-V Processor
- Up to 8 coherent E3 Cores and optional L2 Cache Controller
- Configurable core performance
- Optional Single or Double precision Floating Point Unit
- Level 1 Memory System and ECC
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Low-power 32-bit RISC-V processor
- RISC-V RV32 instruction set:
- Machine mode only
- 32 vectorized interrupts
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32-bit RISC-V embedded processor with TÜV SÜD ISO 26262 ASIL B certification
- Flexible use cases
- roven technology
- State-of-the-art safety and security
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ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
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Ultra High Performance 32-bit RISC-V Embedded Processor
- 7 core architectural features
- Performance and Area
- Very flexible memory system
- Functional Safety and Security and Real Time features
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RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
- RISC, and RISC + DSP 32-bit processors for ultra-low power embedded apps
- Based on the RISC-V ISA, leveraging standard 32-bit protocols (and extensions)