ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications

Overview

The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. The DSP enhanced implementation (RMX-500D) adds DSP capability for applications such as IoT wearable devices where the combination of low power and signal processing are required to enable device performance and extend battery life.
The ARC-V RMX-500 processors are based on the RISC-V instruction set architecture (ISA). The processors feature an efficent 5-stage pipeline that provides excellent throughput for embedded applications.
The ARC-V RMX-500 features up to 64KB of level 1 (L1) instruction & data cache and up to 2MB each of closely coupled instruction and data memories (CCM).
The DSP-enhanced RMX-500D cores include an optimized DSP implementation that features support for fixed-point DSP datatypes and vector operations.
To enable easy DSP software development, the ARC MetaWare Development Toolkit features a rich DSP software library and the included C/C++ Compiler supports commonly used DSP datatypes for easy algorithm programming.

Key Features

32-bit RISC-V embedded CPU with a 5-stage pipeline
DSP implementation to extend the RISC-V baseline (RMX-500D)
2 KB to 64 KB instruction & data L1 caches
Up to 2MB instruction and data closely coupled memory (CCM)
Architectural clock gating and enhanced sleep instructions
RISC-V S-mode security
RISC-V Memory Protection Unit (ePMP) to control access rights to the memory
ECC / parity support
Integrated watchdog timer
32x32 multiplier / Configurable hardware divider
Advanced Platform Level Interrupt Controller (APLIC) supporting up to 1023 wired interrupts
DSP support (RMX-500D): Unified MUL-MAC unit; Fractional data type support; Multiple rounding modes
Native Arm AMBA® AXI™, AHB and AHB-Lite™ interfaces
JTAG and Compact JTAG (cJTAG) debug interface

Benefits

RISC, and RISC + DSP 32-bit processors for low-power embedded applications
Based on the RISC-V ISA, leveraging standard 32-bit protocols (and extensions)
DSP instruction extensions (RMX-500D)
Easy DSP programming support with MetaWare C/C++ Compiler (RMX-500D)
Feature-rich DSP software library for easy algorithm programming
High degree of configurability
Support for custom instructions
Support for up to 64KB of L1 instruction and data caches
Support for up to 2 MB of closely coupled instruction and data memory and direct mapping of peripherals
Native Arm AMBA® AHB™, AHBLite™ and AXI interfaces
Optional 32x32 or 16x16 single and multicycle multiplier
ECC/Parity support
RISC-V AIA compatible interrupt handling architecture
ARC Trace I/F provides real-time trace debugging features

Applications

Industrial: Motor control, smart metering, smart cities
Automotive: Sensors, keyless entry, body electronics, safety management
Consumer: AIoT, wearables
Storage: consumer SSDs, eMMC, UFS, SD cards
Networking: LPWAN, M2M, BLE control, wireless access (WAP)

Deliverables

Industrial: Motor control, smart metering, smart cities
Automotive: Sensors, keyless entry, body electronics, safety management
Consumer: AIoT, wearables
Storage: consumer SSDs, eMMC, UFS, SD cards
Networking: LPWAN, M2M, BLE control, wireless access (WAP)

Technical Specifications

Maturity

Available on request

Availability

Available

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