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AMBA AHB / APB IP

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Search (209)
Compare 209 AMBA AHB / APB IP from 24 vendors (1 - 10)
  • AMBA AHB 3 Lite Verification IP
    • The AMBA 3 AHB-Lite Verification IP provides an effective & efficient way to verify the components interfacing with AMBA®3 AHB-Lite bus of an IP or SoC.
    • The  AMBA 3 AHB-Lite VIP is fully compliant with standard AMBA 3 AHB-Lite specification from ARM.
    • This VIP is a light weight VIP with easy plug-andplay interface so that there is no hit on the design cycle time.
    Block Diagram -- AMBA AHB 3 Lite Verification IP
  • AHB/AXI/Wishbone DMA Controller
    • The AXI4-SGDMA IP core implements a Host-to-Peripheral (H2P), or a Peripheral-to-Host (P2H) Direct Memory Access (DMA) engine, which interfaces the host system with an AXI4 Memory-Mapped master port and the peripheral with either a slave or a master AXI4-Stream port.
    • The core operates in either Scatter-Gather (SG) Mode, reading descriptors from a run-time defined memory mapped-location, or in Direct Mode, transferring data according to a descriptor stored in local registers.
    Block Diagram -- AHB/AXI/Wishbone DMA Controller
  • Verification IP for AMBA
    • AMBA® ACE and CHI coherent interconnect technologies enable an entirely new class of high-performance datacenter applications in areas of machine learning, network processing, storage off-load, in-memory database, and 4G/5G wireless technology.
    • Processor architectures and accelerators can now seamlessly operate over cache coherent intercon nects using the right combination of general-purpose processors and heterogeneous acceleration devices, such as FPGAs, GPUs, network/ storage adapters, intelligent networks, and custom ASICs.
    Block Diagram -- Verification IP for AMBA
  • SPI to AHB Bridge
    • The SPI to AHB bridge is an SPI slave that provides a link between a SPI bus (that consists of two data signals, one clock signal and one select signal) and AMBA AHB.
    • On the SPI bus the slave acts as an SPI memory device where accesses to the slave are translated to AMBA accesses.
    • The core can translate SPI accesses to AMBA byte, half-word or word accesses. The access size to use is configurable via the SPI bus.
    Block Diagram -- SPI to AHB Bridge
  • 10/100 Mbit Ethernet MAC
    • The GRETH core implements a 10/100 Mbit/s Ethernet Media Access Controller (MAC) with AMBA host interface.
    • The core implements the 802.3-2002 Ethernet standard. Receive and transmit data is autonomously transferred between the Ethernet MAC and the AMBA AHB bus using DMA transfers.
    Block Diagram -- 10/100 Mbit Ethernet MAC
  • CAN 2.0 Controller with DMA
    • GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend.
    • The APB bus is used for configuration, control and status handling and the AHB bus is used for retrieving and storing CAN messages via the DMA engine.
    Block Diagram -- CAN 2.0 Controller with DMA
  • AMBA AHB Direct Memory Acess (DMA) Controller
    • Multiple independent DMA channels with direct AHB bus interface.
    • DMA transfers between AHB memory devices and I/O ports.
    • Scatter-gather allows DMA to merge multiple data source to contiguous space.
    • Supports both hardware initiated transfer and software initiated transfer.
    Block Diagram -- AMBA AHB Direct Memory Acess (DMA) Controller
  • AMBA AHB Bus Master
    • Supports AHB bus interface to the ARM CPU.
    • User interface designed for high speed access to any slave devices on the AHB Bus.
    • User specified single or burst data access on the AHB interface and user interface.
    • Handles wait state insertion by any slave devices.
    Block Diagram -- AMBA AHB Bus Master
  • AMBA AHB Bus Slave
    • Supports AHB bus interface to the ARM CPU.
    • User interface designed for high speed access to two sets of on-chip or off-chip modules.
    • Four write buffers to process posted write.
    • Dual read buffers to process CPU read.
    Block Diagram -- AMBA AHB Bus Slave
  • AMBA AHB to PCI Host Bridge
    • Fully supports PCI specification 2.1 and 2.2 protocol.
    • Supports AHB bus protocol.
    • Downstream access transfer from AHB bus to PCI bus.
    • Upstream access transfer from PCI bus to AHB bus.
    Block Diagram -- AMBA AHB to PCI Host Bridge
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