Processor IP for TSMC

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Compare 29 Processor IP for TSMC from 9 vendors (1 - 10)
  • Audio and control DSP
    • Quad 16x16 MACs
    • Dual 32x32 MACs
    • 4-way VLIW
    Block Diagram -- Audio and control DSP
  • Baseband processor
    • The Ceva-BX2 baseband processor IP handles both signal-processing and control workloads with up to 16 GMACs per second performance and high-level-language programming.
    • It supports a range of integer and floating-point data types for a wide range of baseband applications like 5G PHY control, and exploits a high degree of parallelism, but with remarkably compact code size.
    • Optimized high-speed interfaces expedite connection to other Ceva cores or to accelerators.
    Block Diagram -- Baseband processor
  • 32-bit High Performance RV32GC Single/Multicore RISC System-on-Chip
    • High Performance 32-bit RV32GC CPU
    • Proprietary 6-stage pipeline
    • Single or multicore implementation
    Block Diagram -- 32-bit High Performance RV32GC Single/Multicore RISC System-on-Chip
  • 32-bit High Performance RV32GC Single/Multicore RISC Processor
    • High Performance 32-bit RV32GC CPU
    • Proprietary 6-stage pipeline
    • Single or multicore implementation
    • Up to 1.38 DMIPS/MHz/Core
    Block Diagram -- 32-bit High Performance RV32GC Single/Multicore RISC Processor
  • 8/16-Bit Microcontroller Based on the W65C816
    • - Intel PSG MAX10M16 SA FPGA
    • - ~16,000 Logic Elements Available
    • - Operating Voltage – 3.3V
    • - System Operation Speed – 14.7456 MHz
    Block Diagram -- 8/16-Bit Microcontroller Based on the W65C816
  • 8-Bit Microcontroller Based on the W65C02
    • - Intel PSG MAX10M08 SA FPGA
    • - ~8,000 Logic Elements Available
    • - Operating Voltage – 3.3V
    • - System Operation Speed – 14.7456 MHz
    Block Diagram -- 8-Bit Microcontroller Based on the W65C02
  • 8-Bit Microcontroller Based on the W65C02
    • -8-bit data bus
    • -Intel PSG MAX10M08SC FPGA with 8,000 Logic Elements Available
    • -Operating Voltage – 3.3V
    • -W65C02RTL MPU @ 14.7456 MHz with external memory bus for memory and module expansion
    Block Diagram -- 8-Bit Microcontroller Based on the W65C02
  • Revolutionary Quad-Pipelined Ultra High Performance Microcontroller
    • 100% binary compatible with industry standard 80C251, implementing BINARY and SOURCE modes
    • Single clock period per most of instructions
    • Quad-Pipelined architecture enables to run 75 times faster than the original 80C51 and 6 times faster, than the 80C251 at the same frequency
    • Up to 75.08 VAX MIPS at 100 MHz
  • Pipelined High Performance Microcontroller
    • Software in 100% compatible with 80390 & 8051 industry standards
    • Pipelined RISC architecture enables to run 15.55 times faster, than the original 80C51 at the same frequency
    • Up to 14.632 VAX MIPS at 100 MHz
    • 24 times faster multiplication
  • Pipelined High Performance Microcontroller
    • Software in 100% compatible with 8051 industry standard
    • Pipelined RISC architecture enables to run 15.55 times faster, than the original 80C51 at the same frequency
    • Up to 14.632 VAX MIPS at 100 MHz
    • 24 times faster multiplication
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